High performance extremely thin SOI (ETSOI) hybrid CMOS with Si channel NFET and strained SiGe channel PFET

Autor: H. He, Kangguo Cheng, Yu Zhu, Sean Teehan, Toshiharu Nagumo, M. Terrizzi, A. Upham, James Chingwei Li, R. Sampson, Walter Kleemeier, G. Pfeiffer, Alexander Reznicek, Lisa F. Edge, Alex Hubbard, L. Grenouillet, Prasanna Khare, Qing Liu, R. Johnson, Bich-Yen Nguyen, Pouya Hashemi, J. Kuss, Ghavam G. Shahidi, Scott Luning, Thomas N. Adam, Romain Wacquez, Frederic Allibert, Sebastian Naczas, T. Wu, Y. Le Tiec, S. Holmes, Bruce B. Doris, T. Levin, Ali Khakifirooz, Maud Vinet, Tak H. Ning, A. Inada, Z. Zhu, Nicolas Loubet, Anita Madan, J. Gimbert, Mukesh Khare, N. Klymko, Robert H. Dennard
Rok vydání: 2012
Předmět:
Zdroj: 2012 International Electron Devices Meeting.
DOI: 10.1109/iedm.2012.6479063
Popis: For the first time, we report high performance hybrid channel ETSOI CMOS by integrating strained SiGe-channel (cSiGe) PFET with Si-channel NFET at 22nm groundrules. We demonstrate a record high speed ring oscillator (fan-out = 3) with delay of 8.5 ps/stage and 11.2 ps/stage at V DD = 0.9V and V DD = 0.7V, respectively, outperforming state-of-the-art finFET results. A novel “STI-last” integration scheme is developed to improve cSiGe uniformity and enable ultra high performance PFET with narrow widths. Furthermore, cSiGe modulates device V t , thus providing an additional knob to enable multi-V t while maintaining undoped channels for all devices.
Databáze: OpenAIRE