Software and Hardware Implementation of Video Camera, Compatible with GigE Vision Standard
Autor: | Anton Yuriovych Varfolomieiev, Valerii Ivanovych Marchenko, Tymofii Andriiovych Khodniev |
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Rok vydání: | 2018 |
Předmět: | |
Zdroj: | Microsystems, Electronics and Acoustics. 23:32-37 |
ISSN: | 2523-4455 2523-4447 |
DOI: | 10.20535/2523-4455.2018.23.5.147686 |
Popis: | Different variants of video streaming technologies are considered. From the standpoint of locally distributed computer vision systems implementation, the GigE Vision technology is selected for further investigation, since it is capable of providing relatively long channel distances, high robustness and image quality, low latency of video data transmission, and uses standard connection interfaces available in most of computers. Thereby the implementation of own GigE Vision compatible camera is chosen as the particular objective of the paper. Two ways of achieving of this objective are considered. The fists one is based on software implementation solely, and uses Aravis open source library, which is coupled with the Video4Linux API. It is shown that this software solution is capable of video streaming, but has high transmission delays, making it inexpedient for use in real-time computer vision systems. On the basis of experiments and the analysis of channel load, it was found that in the test system, the delays were caused mainly by the Video4Linux library. To overcome this problem, the second variant of camera, which uses the hardware implementation of primary video capturing part, was proposed. It is based on system-on-chip (SoC) solution, which incorporates FPGA and ARM-processor. In this system, the video sensor is connected to the FPGA. In the FPGA, the control of video sensor and the special direct memory access controller are implemented. As in the first camera variant, the Aravis library is responsible for the data transmission over Ethernet (it “resides” in the ARM-processor part of SoC). The direct memory access controller, which is implemented in the FPGA part, fills a dedicated buffer in ARM-processor’s RAM, taking into account the peculiarities of data transmission over the network. Particularly, data are sent using UDP protocol by portions, thus the controller includes the respective module, which generates interrupt requests immediately, when some fraction of pixels are loaded from the video sensor to the buffer. This fraction can be optimally estimated from the properties of network connection and is controlled by the Aravis library. Such a structure of direct memory access controller does not require waiting of a full frame transferring from the video sensor (which appears in Video4Linux API) and consequently allow to perform pipelined processing, which leads to minimization of data transmission delays. Ref. 10, fig. 3. |
Databáze: | OpenAIRE |
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