System Integration of RISC-V Processors with FD-SOI

Autor: Po-Hung Chen, Hanh-Phuc Le, Brian Richards, Pi-Feng Chiu, Milovan Blagojević, Elad Alon, James Dunn, Nicholas Sutardja, Jaehwa Kwak, Ben Keller, Yunsup Lee, Palmer Dabbelt, Rimas Avizienis, Stevo Bailey, Andreia Cathelin, Alberto Puggelli, Andrei Vladimirescu, Brian Zimmer, Philippe Flatresse, Andrew Waterman, Colin Schmidt, Ruzica Jevtic, Martin Cochet, Krste Asanovic, Borivoje Nikolic
Rok vydání: 2020
Předmět:
Zdroj: Integrated Circuits and Systems ISBN: 9783030394950
DOI: 10.1007/978-3-030-39496-7_11
Popis: Improving the energy efficiency of processor systems-on-chip (SoCs) is key to improving their performance and utility. The FD-SOI silicon process enables integrated systems that can deliver dramatic improvements in energy efficiency through system integration. This chapter presents the Raven-3 and Raven-4 testchips, fully integrated and fully featured SoCs which achieve energy-efficient operation with low overhead. RISC-V processors allow for innovation and experimentation in the context of a free, open architecture. Integrated switched-capacitor voltage regulators can achieve high conversion efficiency when coupled with adaptive clock generators. Custom SRAM macros operate at low supply voltages, enabling wide voltage scaling. An integrated body-bias generator allows run-time tuning of threshold voltage for improved performance or reduced leakage. Taken together, these innovations showcase the possibilities of FD-SOI technology.
Databáze: OpenAIRE