A greedy router with technology targetable output

Autor:	R. Balakrishnan, R.F. Hobson
Rok vydání:	1999
Předmět:	Router Very-large-scale integration Read-only memory Computer science business.industry Integrated circuit design Data structure Integrated circuit layout Porting Computer architecture Embedded system Hardware_INTEGRATEDCIRCUITS Routing (electronic design automation) business
Zdroj:	Great Lakes Symposium on VLSI
DOI:	10.1109/glsv.1999.757427
Popis:	Our objective was to integrate an effective channel routing algorithm with the Chip Design Language (CDL) algorithmic layout tool. CDL uses technology targetable layout techniques, so that the output of the routing algorithm can easily be ported to different technologies. We introduce the technology independent features of CDL and describe how a greedy router can be interfaced to it. Specific features of interest include mapping from the grid based router to the gridless CDL environment, and the automatic insertion of CDL feed-through cells in multi-channel applications.
Databáze:	OpenAIRE
Externí odkaz:	https://explore.openaire.eu/search/publication?articleId=doi_________::569c2a0564cc014f9c4057036c6c855a https://doi.org/10.1109/glsv.1999.757427 Zobrazit plný text záznamu