7‐2: Invited Paper: A 40 nm Gate Length Surrounding Gate Vertical‐Channel FET Using Thermally Stable In‐Al‐Zn‐O Channel for 3D CMOS‐LSI Applications

Autor:	Tomomasa Ueda, Keiji Ikeda, Nobuyoshi Saito, Hirokazu Fujiwara, Yuta Sato
Rok vydání:	2021
Předmět:	Vertical channel Back end of line Materials science Oxide semiconductor CMOS business.industry Gate length Optoelectronics business Communication channel
Zdroj:	SID Symposium Digest of Technical Papers. 52:61-64
ISSN:	2168-0159 0097-966X
Databáze:	OpenAIRE
Externí odkaz:	https://explore.openaire.eu/search/publication?articleId=doi_________::5546950f0cac60d4d39f6078da07e3b0 https://doi.org/10.1002/sdtp.14610 Zobrazit plný text záznamu Plný text