| Autor: |
Mango C.-T. Chao, Keng-Wei Chang, Jian-Min Huang, Szu-Pang Mu, Chun-Yang Huang, Shi-Hao Chen |
| Rok vydání: |
2018 |
| Předmět: |
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| Zdroj: |
ITC-Asia |
| DOI: |
10.1109/itc-asia.2018.00016 |
| Popis: |
This paper presents a framework which can avoid the lengthy system test by utilizing machine-learning techniques to classify parts into different DVFS bins based on the results collected at CP and FT test only. The core machine-learning techniques in use are Bayesian linear regression for model fitting and stepwise regression for feature selection. Another method, called the incremental F_max-model search, is also presented to reduce the test time of collecting the required data for each training sample. The experiments are conducted based on 249 test chips of an industrial SoC. The experimental results demonstrate that our proposed framework can achieve a high accuracy ratio of placing a part into correct DVFS bin without placing any slower part into a faster DVFS bin. The experimental results also demonstrate that the incremental F_max-model search can save 45.1% and 52.6% of applications of the system-level test compared to the conventional median linear search and binary search, respectively. |
| Databáze: |
OpenAIRE |
| Externí odkaz: |
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