Layout Synthesis Design Flow for Special-Purpose Reconfigurable Systems-on-a-Chip
| Autor: | V. I. Enns, S.V. Gavrilov, Mariya A. Zapletina, V.M. Khvatov, R. Zh. Chochaev, D. A. Zheleznikov |
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| Rok vydání: | 2019 |
| Předmět: |
010302 applied physics
business.industry Computer science Design flow 02 engineering and technology 021001 nanoscience & nanotechnology Condensed Matter Physics Chip 01 natural sciences Electronic Optical and Magnetic Materials Computer architecture 0103 physical sciences Hardware_INTEGRATEDCIRCUITS Materials Chemistry Decomposition (computer science) Microelectronics Electrical and Electronic Engineering Routing (electronic design automation) 0210 nano-technology business Electronic circuit |
| Zdroj: | Russian Microelectronics. 48:176-186 |
| ISSN: | 1608-3415 1063-7397 |
| DOI: | 10.1134/s1063739719030053 |
| Popis: | A layout synthesis design flow for implementing designs on reconfigurable systems-on-chip is developed by the Institute for Design Problems in Microelectronics of Russian Academy of Sciences, in cooperation with JSC “NIIME” for special-purpose circuits produced at PJSC “Mikron”. The developed methodology includes new techniques to solve layout synthesis problems at different design flow stages, including the initial circuit decomposition, placement of logical elements, and the interconnections routing. Presented design flow makes it possible to accelerate the development of large IP blocks for reconfigurable systems-on-chip with multiple types of switching elements and system-on-chip components. |
| Databáze: | OpenAIRE |
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