Accurate Modeling Method for Cu Interconnect
| Autor: | Hiroyasu Minda, Michio Sakurai, Sadayuki Ohnishi, Hideo Sakamoto, Noriaki Oda, Kenta Yamada, Norio Okada, Manabu Iguchi, Hiroshi Kitahara, Makoto Yasuda, Toshiyuki Takewaki, Masayuki Hiroi, Yoshihiko Asai, M. Suzuki |
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| Rok vydání: | 2008 |
| Předmět: |
Interconnection
Engineering business.industry Copper interconnect Integrated circuit Electronic Optical and Magnetic Materials law.invention CMOS Etching (microfabrication) law Chemical-mechanical planarization Hardware_INTEGRATEDCIRCUITS Electronic engineering Electrical and Electronic Engineering business Lithography Design closure |
| Zdroj: | IEICE Transactions on Electronics. :968-977 |
| ISSN: | 1745-1353 0916-8524 |
| Popis: | This paper proposes an accurate modeling method of the copper interconnect cross-section in which the width and thickness dependence on layout patterns and density caused by processes (CMP, etching, sputtering, lithography, and so on) are fully, incorporated and universally expressed. In addition, we have developed specific test patterns for the model parameters extraction, and an efficient extraction flow. We have extracted the model parameters for 0.15μm CMOS using this method and confirmed that 10%τpd error normally observed with conventional LPE (Layout Parameters Extraction) was completely dissolved. Moreover, it is verified that the model can be applied to more advanced technologies (90nm, 65nm and 55nm CMOS). Since the interconnect delay variations due to the processes constitute a significant part of what have conventionally been treated as random variations, use of the proposed model could enable one to greatly narrow the guardbands required to guarantee a desired yield, thereby facilitating design closure. |
| Databáze: | OpenAIRE |
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