Autor: |
A. Maxim, R. Poorfard, M. Chennam, T. Nutt, Z. Dong, James Kao, David S. Trager, Richard A. Johnson, P. Crawley |
Rok vydání: |
2007 |
Předmět: |
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Zdroj: |
IEEE Journal of Solid-State Circuits. 42:967-982 |
ISSN: |
0018-9200 |
DOI: |
10.1109/jssc.2007.894336 |
Popis: |
A low-IF fully integrated tuner for DBS satellite TV applications has been realized in 0.13-mum CMOS. A wideband ring oscillator-based frequency synthesizer having a large frequency step was used to downconvert a cluster of channels to a sliding low-IF frequency, while the second downconversion to baseband was performed in the digital domain. Eliminating the inductors and using a small-area oscillator has reduced both the parasitic magnetic and substrate coupling, allowing single-chip integration of the sensitive tuner and the noisy digital demodulator. A significant reduction in die area was achieved by using a single oscillator to cover the entire satellite TV spectrum, while a noise attenuator was cascaded with the PLL passive loop filter to reduce the equivalent VCO tuning gain. This improves PLL noise and spur performance and allows the on-chip integration of the loop filter. The digital low-IF tuner allows the use of a discrete step AGC loop that results in lower noise figure and higher linearity. Automatic signal path gain and bandwidth digital calibration was realized using replica ring oscillators. Tuner specifications include: 90 dB gain range, 10 dB noise figure at max gain, +25dBm IIP3 at min gain, 1.3deg rms integrated phase noise |
Databáze: |
OpenAIRE |
Externí odkaz: |
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