Gate Oxide Short Defect Model in FinFETs
| Autor: | Dhamin Al-Khalili, Roya Dibaj, Maitham Shams |
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| Rok vydání: | 2018 |
| Předmět: |
Cuboid
Materials science Manufacturing process business.industry 02 engineering and technology Fault modeling 021001 nanoscience & nanotechnology Circuit reliability 020202 computer hardware & architecture Planar Gate oxide MOSFET 0202 electrical engineering electronic engineering information engineering Optoelectronics Electrical and Electronic Engineering 0210 nano-technology business Leakage (electronics) |
| Zdroj: | Journal of Electronic Testing. 34:351-362 |
| ISSN: | 1573-0727 0923-8174 |
| DOI: | 10.1007/s10836-018-5727-8 |
| Popis: | FinFET technology is one of the most promising candidates in replacing planar MOSFET beyond the 22 nm technology node. However, the complexity of FinFET manufacturing process has caused challenges in reliable device testing. Gate oxide short (GOS) is one of the dominant defects that has significant impact on circuit reliability. In this paper, we present a GOS defect model for FinFETs by introducing the defect as a pinhole in the gate oxide of a triangular fin shape structure. The pinholes are represented by small cuboid cuts of various sizes on the fin top and sidewalls along the channel. The 3D Sentaurus TCAD simulation results in the development of an analytical GOS defect model that can be used in circuit-level fault modeling, which leads to generating more realistic test patterns. |
| Databáze: | OpenAIRE |
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