A 3.84 gips integrated memory array processor
| Autor: | Nobuyuki Yamashita, Shin'ichiro Okazaki, Kazuyuki Nakamura, Tohru Kimura, Yoshihiro Fujita |
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| Rok vydání: | 1996 |
| Předmět: |
Very-large-scale integration
Computer science business.industry Parallel algorithm Multiprocessing BiCMOS Theoretical Computer Science Vector processor Computational Theory and Mathematics Parallel processing (DSP implementation) Hardware and Architecture Embedded system Static random-access memory SIMD business Information Systems |
| Zdroj: | Systems and Computers in Japan. 27:26-36 |
| ISSN: | 1520-684X 0882-1666 |
| DOI: | 10.1002/scj.4690270303 |
| Popis: | An integrated memory array processor (IMAP) ULSI with 64 processing elements and a 2 Mb SRAM has been developed to build a compact real-time image processing system. The chip attains a 3.84 GIPS peak performance through the use of SIMD parallel processing and 1.28 GByte/s on-chip processor-memory bandwidth. The IMAP is capable of parallel indexed addressing, which increases applications for parallel algorithms. Created using 0.55 μm BiCMOS double layer metal process technology, the IMAP contains 11 million translators in a 15.1 x 15.6 mm 2 die area. |
| Databáze: | OpenAIRE |
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