Noise-shaping time-interleaved ADC based on a single ring oscillator and a sampling array
| Autor: | Carlos Alberto Díaz Pérez, Luis Hernandez, Andres Quintero, Eric Gutierrez, Susana Paton |
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| Rok vydání: | 2017 |
| Předmět: |
Engineering
business.industry 020208 electrical & electronic engineering Delay line oscillator 02 engineering and technology Ring oscillator Noise shaping Effective number of bits Voltage-controlled oscillator Delay Hardware_INTEGRATEDCIRCUITS 0202 electrical engineering electronic engineering information engineering Electronic engineering Oversampling business XOR gate |
| Zdroj: | MWSCAS |
| DOI: | 10.1109/mwscas.2017.8053015 |
| Popis: | An alternative architecture to conventional voltage controlled oscillator based analog-to-digital converters (VCO-ADCs) is proposed in this paper. The new architecture allows to enhance the resolution of the converter without the need of extending noise shaping order. Instead, the oversampling ratio is increased by sampling the outputs of the VCO through an array of digital delay lines. The output of this array is decoded with a modified array of XOR gates that makes higher VCO oscillation frequency possible. This allows to process the output data as samples of a highly oversampled sequence. We analyze the sensitivity to time delay mismatch in the elements of the delay line. A robust behavior is observed due to the error averaging through the sampling array elements. The proposed architecture achieves more than 10 ENOB for analog bandwidths (ABWs) higher than 100 MHz using feasible clock rates and scalable and mostly digital circuitry. |
| Databáze: | OpenAIRE |
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