Design and implementation of reversible logic gates using silicene-based p–n junction logic devices
| Autor: | Deep Kamal Kaur Randhawa, Inderdeep Singh Bhatia |
|---|---|
| Rok vydání: | 2021 |
| Předmět: |
010302 applied physics
Pass transistor logic Silicene Computer science Spice Truth table Hardware_PERFORMANCEANDRELIABILITY 02 engineering and technology 021001 nanoscience & nanotechnology 01 natural sciences Multiplexer Atomic and Molecular Physics and Optics Electronic Optical and Magnetic Materials Reduction (complexity) CMOS Modeling and Simulation Logic gate 0103 physical sciences Hardware_INTEGRATEDCIRCUITS Electronic engineering Electrical and Electronic Engineering 0210 nano-technology Hardware_LOGICDESIGN |
| Zdroj: | Journal of Computational Electronics. 20:735-744 |
| ISSN: | 1572-8137 1569-8025 |
| DOI: | 10.1007/s10825-020-01625-z |
| Popis: | Advancements in adiabatic quantum computing have enabled a rapid development in thermodynamically reversible logic circuits, which can reduce energy wastage to almost negligible levels. Various reversible logic gates using silicene-based multiplexer logic devices (SMLDs) are designed and demonstrated herein using Verilog-A, then validated by SPICE circuit simulations. The results confirm that the various reversible gates correctly implement the corresponding truth tables, thereby validating the use of SMLDs as building blocks for such gates. The SMLD-based reversible logic gate designs enable a reduction in hardware complexity by 76.92–80.64% compared with complementary metal–oxide–semiconductor (CMOS) technology and a 50% reduction in hardware compared with pass transistor logic-based designs, respectively. |
| Databáze: | OpenAIRE |
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