Demonstration of 3D sequential FD-SOI on CMOS FinFET stacking featuring low temperature Si layer transfer and top tier device fabrication with tier interconnections

Autor:	A. Vandooren, N. Parihar, J. Franco, R. Loo, H. Arimura, R. Rodriguez, F. Sebaai, S. Iacovo, K. Vandersmissen, W. Li, G. Mannaert, D. Radisic, E. Rosseel, A. Hikavyy, A. Jourdain, O. Mourey, G. Gaudin, S. Reboh, L. Le Van-Jodin, G. Besnard, C. Roda Neve, B-Y. Nguyen, I. Radu, E. Dentoni Litta, N. Horiguchi
Rok vydání:	2022
Zdroj:	2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits).
DOI:	10.1109/vlsitechnologyandcir46769.2022.9830400
Databáze:	OpenAIRE
Externí odkaz:	https://explore.openaire.eu/search/publication?articleId=doi_________::515fe5ccadfc84269cf38e558b9b7db0 https://doi.org/10.1109/vlsitechnologyandcir46769.2022.9830400 Zobrazit plný text záznamu