A Fast-Lock, Jitter Filtering All-Digital DLL Based Burst-Mode Memory Interface
| Autor: | Brian Tsang, Teva Stone, Masum Hossain, Farrukh Aquil, John Eble, Barry Daly, J. Wei, Chanh Tran, Kurt Knorpp, Pak Shing Chau, Jared L. Zerbe, Phuong Le |
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| Rok vydání: | 2014 |
| Předmět: | |
| Zdroj: | IEEE Journal of Solid-State Circuits. 49:1048-1062 |
| ISSN: | 1558-173X 0018-9200 |
| DOI: | 10.1109/jssc.2013.2297403 |
| Popis: | A 800 Mb/s to 3.2 Gb/s memory interface is designed that achieves 30% improved energy efficiency by eliminating idle mode power completely. The link is similar to a standard DDR architecture with the addition of a fast-lock DLL on the memory side that wakes up from 0 mW and locks within 3 clock cycles consuming 24 mW with residual timing error less than 33 mUI. Following initial lock, the DLL operates in a closed loop to compensate for V,T drift consuming 6 mW @ 1.6 GHz including a replica buffer. By incorporating an injection locked oscillator inside the loop, the DLL provides PLL like high frequency input jitter filtering, and corrects ±10% DCD without an additional duty cycle correction loop. |
| Databáze: | OpenAIRE |
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