| Autor: |
Freeman Zhong, C. Liu, Yikui Jen Dong |
| Rok vydání: |
2007 |
| Předmět: |
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| Zdroj: |
ISCAS |
| DOI: |
10.1109/iscas.2007.378594 |
| Popis: |
The paper presents a novel fully-integrated AC-coupling circuit with hybrid common-mode voltage generation and baseline-wander compensation. The on-chip generated and dynamically maintained Vcm offers the maximum freedom for circuit optimization. The BLW compensation can deal with wanders immersed in excessive channel-limiting ISI, and imposes `zero' resistive or capacitive loads to the high-speed data line. The high-frequency kick-back noise contamination is also mitigated. The proposed circuit is implemented in 90nm standard CMOS and validated on silicon. |
| Databáze: |
OpenAIRE |
| Externí odkaz: |
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