A 24mm2 Quad-Band Single-Chip GSM Radio with Transmitter Calibration in 90nm Digital CMOS

Autor: I. Deng, Oren Eliezer, Khurram Waheed, C. Lin, D. Leipold, Gennady Feygin, Jaimin Mehta, Robert B. Staszewski, T. Murphy, N. Barton, T. Jung, T. Almholt, J. Kerr, Sameh S. Rezeq, Kah Mun Low, John Wallberg, Sumeer Bhatara, Chih-Ming Hung, Kenneth J. Maggio, Manouchehr Entezari, J. Jaehnig, Imran Bashir, T. Mayhugh, Robert Bogdan Staszewski, Sudheer Vemulapalli, P. Cruise, Meng-Chang Lee, C. Fernando, S. Glock, Yo-Chuol Ho, S. Larson, Imtinan Elahi, Khurram Muhammad
Rok vydání: 2008
Předmět:
Zdroj: ISSCC
Popis: The RF transceiver is built on the Digital RF Processor (DRP) technology. The ADPLL-based transmitter uses a polar architecture with all-digital PM-FM and AM paths. The receiver uses a discrete-time architecture in which the RF signal is directly sampled and processed using analog and DSP techniques. A 26 MHz digitally controlled crystal oscillator (DCXO) generates frequency reference (FREF) and has a means of high-frequency dithering to minimize the effects of coupling from digitally controlled PA driver (DPA) to DCXO by de-sensitizing its slicing buffer.
Databáze: OpenAIRE