| Autor: |
Takuya Akiba, K. Takahashi, Junichiro Makino, T. Kato, A. Takahashi, Tanvir Ahmed, Kei Hiraki, S. Kitajo, G. Watanabe, Y. Doi, J. Ono, K. Mizumaru, Hiroto Imachi, T. Adachi, H. Kaneko, Y. Tomonaga, Johannes Maximilian Kühn, S. Kashihara, Ryosuke Okuta, Y. Takatsukasa, T. Yamauchi, Ken Namura, N. Tanaka, H. Miyashita, Brian Vogel, F. Osawa |
| Rok vydání: |
2021 |
| Předmět: |
|
| Zdroj: |
VLSI Circuits |
| DOI: |
10.23919/vlsicircuits52068.2021.9492395 |
| Popis: |
MN-Core is a highly efficient deep learning training accelerator reaching in excess of 1 TFLOPS/W (half-precision) at board level in real-world mixed-precision workloads. To reach and sustain this level of performance, the design is partitioned and packaged as four-die MCM package exceeding 3000mm2 of die area. |
| Databáze: |
OpenAIRE |
| Externí odkaz: |
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