Performance Analysis of Bus Architecture Due to Data Traffic Concentration
Autor: | Kook-Pyo Lee, Si-Young Koh |
---|---|
Rok vydání: | 2012 |
Předmět: |
General Computer Science
business.industry Computer science Arbiter Hardware_PERFORMANCEANDRELIABILITY ComputerSystemsOrganization_PROCESSORARCHITECTURES IEBus Embedded system Address bus ComputerSystemsOrganization_SPECIAL-PURPOSEANDAPPLICATION-BASEDSYSTEMS Local bus business Back-side bus Control bus Computer network System bus |
Zdroj: | The Journal of the Korean Institute of Information and Communication Engineering. 16:2261-2266 |
ISSN: | 2234-4772 |
DOI: | 10.6109/jkiice.2012.16.10.2261 |
Popis: | The general bus system architecture consists of masters, slaves, arbiter, decoder and so on in shared bus. As several masters can't use a bus concurrently, arbiter plays an role in bus arbitration. In compliance with the selection of arbitration method, The efficiency of bus usage can be determined. Fixed Priority, Round-Robin, TDMA, Lottery arbitration are studied in conventional arbitration method. In this paper, we draw the performance analysis of Fixed Priority, Round Robin, TDMA and Lottery bus arbitration policies due to the data traffic concentration and propose the methods of performance improvement. |
Databáze: | OpenAIRE |
Externí odkaz: |