A 5 Gb/s 0.25 μm CMOS jitter-tolerant variable-interval oversampling clock/data recovery circuit

Autor:	null Sang-Hyun Lee, null Moon-Sang Hwang, null Youngdon Choi, null Sungjoon Kim, null Yongsam Moon, null Bong-Joon Lee, null Deog-Kyoon Jeong, null Wonchan Kim, null Young June Park, null Gi-Jung Ahn
Rok vydání:	2003
Zdroj:	2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315).
Databáze:	OpenAIRE
Externí odkaz:	https://explore.openaire.eu/search/publication?articleId=doi_________::4e823fac1420247ce46152aa11b8223e https://doi.org/10.1109/isscc.2002.993033 Zobrazit plný text záznamu