A cost-effective assembly process for flip chips on FR-4

Autor: P. Gratz, E. Meusel, B. Lauterwald, F. Feustel
Rok vydání: 2002
Předmět:
Zdroj: 1998 Proceedings. 48th Electronic Components and Technology Conference (Cat. No.98CH36206).
DOI: 10.1109/ectc.1998.678729
Popis: The application of flip chips is an attractive approach for many innovative products-especially portable systems. For cost reasons, the flip chip assembly has to be integrated into the existing surface mount technology. In this work, the main aspects of an SMT compatible assembly process for flip chips on FR-4 were studied. Test chips up to 9.6 mm edge length were mounted. Two types of substrates were used successfully: FR-4 with SIPAD solder deposits and FR-4 with modified solder mask patterns. The bumping process of the chips as well as the layout of the chips and the substrates is introduced. The placement and the reflow soldering were performed with regular equipment. Important issues of the soldering and the flux selection are discussed. Complete underfilling of the attached flip chips is necessary to achieve a sufficient reliability level. A test methodology is presented to visualize and assess the flow behavior of underfill materials. Measurement results of three representative underfills are discussed. Finally, first reliability results are introduced.
Databáze: OpenAIRE