Autor:	Ralph H. J. M. Otten, G.S. Garcea
Rok vydání:	2001
Předmět:	Set (abstract data type) Interconnection Engineering business.industry Simple (abstract algebra) Electronic engineering Estate business Chip
Zdroj:	SLIP
DOI:	10.1145/368640.368707
Popis:	A simple approach to global wire delays leads to the conclusion that within a few years interconnect is going to demand an overwhelming portion of the chip estate. In addition, memory-to-compute ratio for area is growing very fast. These observations are added to the already considerable set of arguments for breaking radically with traditional silicon design paradigms.
Databáze:	OpenAIRE
Externí odkaz:	https://explore.openaire.eu/search/publication?articleId=doi_________::4d0f7c242a82bcb1960ebe65e45c2b1f https://doi.org/10.1145/368640.368707 Zobrazit plný text záznamu