A Fine-Grain Variation-Aware Dynamic ${\rm Vdd}$ -Hopping AVFS Architecture on a 32 nm GALS MPSoC
Autor: | Yvain Thonnart, Anca Molnos, Farhat Thabet, Robin Wilson, Didier Fuin, Laurent Alacoque, Suzanne Lesecq, Karim Ben Chehida, Diego Puschini, Ivan Miro-Panades, Pascal Vivet, Sylvain Engels, Edith Beigne, Benoit Tain |
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Rok vydání: | 2014 |
Předmět: | |
Zdroj: | IEEE Journal of Solid-State Circuits. 49:1475-1486 |
ISSN: | 1558-173X 0018-9200 |
Popis: | In order to optimize global energy efficiency in the context of dynamic process, voltage and temperature variations in advanced nodes, a fine-grain adaptive voltage and frequency scaling architecture is proposed for multiprocessor systems-on-chip (MPSoC), where each processing element is an independent voltage-frequency island. This architecture has been implemented on a 32 nm globally asynchronous locally-synchronous MPSoC. It shows up to 18.2% energy gains thanks to local adaptability compared with a global dynamic voltage and frequency scaling approach using 25% timing margins between slow and nominal process, by reducing margins to 60 ps of the real process. These gains are obtained for a total area overhead of 10% including local frequency/voltage actuators, sensors, and digital controller. |
Databáze: | OpenAIRE |
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