Autor: |
Y. Ichikawa, Marlene Wan, A. Abnous, Jan M. Rabaey, Katsunori Seno |
Rok vydání: |
2002 |
Předmět: |
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Zdroj: |
1997 IEEE Workshop on Signal Processing Systems. SiPS 97 Design and Implementation formerly VLSI Signal Processing. |
DOI: |
10.1109/sips.1997.625684 |
Popis: |
The continually increasing integration density of integrated circuits portrays important paradigm shifts in next-generation designs, especially in the direction of systems-on-a-chip. Hybrid architectures mixing a variety of computational models are bound to be integrated on a single die. This opens the door for creative high-performance low-energy solutions to the programming problem using techniques such as reconfiguration to construct optimized architectures for a given computational problem. Exploiting the opportunities offered by these architectural innovations obviously requires a clear understanding of the trade-off's offered by the various architectural models and styles, as well as a well-thought out design methodology, combining high-level prediction and analysis tools with partitioning, optimization and mapping techniques. This paper presents an overview of opportunities of these reconfigurable architectures in the architecture domain. |
Databáze: |
OpenAIRE |
Externí odkaz: |
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