High-Performance 1-Bit Full Adder With Excellent Driving Capability for Multistage Structures

Autor:	Ayoub Sadeghi, Nabiollah Shiri, Mahmood Rafiee
Rok vydání:	2022
Předmět:	Adder General Computer Science Computer science Carry (arithmetic) Integrated circuit Die (integrated circuit) Power (physics) law.invention Transmission gate Control and Systems Engineering law Electronic engineering Embedding Hardware_ARITHMETICANDLOGICSTRUCTURES
Zdroj:	IEEE Embedded Systems Letters. 14:47-50
ISSN:	1943-0671 1943-0663
DOI:	10.1109/les.2021.3108474
Popis:	In this brief, a low-power 1-bit full adder (FA) cell is proposed based on the transmission gate (TG) to attain a special module for generating fullswing Carry output. The cell benefits from the high driving capability for both Sum and Carry outputs when embedding in multistage structures like ripplecarry adders (RCAs), compressors, and multipliers. The proposed TG-based FA has a total die area of 60.02 μm2, while the average power, delay, and powerdelay-product (PDP) are 10.829 μW, 3.1954 ns, and 34.603 fJ, respectively. The results introduce the FA cell as an efficient gate for integrated circuits (ICs).
Databáze:	OpenAIRE
Externí odkaz:	https://explore.openaire.eu/search/publication?articleId=doi_________::4b8be0231c5bfd303437c09eedb403db https://doi.org/10.1109/les.2021.3108474 Zobrazit plný text záznamu