A 39-GHz 64-Element Phased-Array Transceiver With Built-In Phase and Amplitude Calibrations for Large-Array 5G NR in 65-nm CMOS

Autor: Naoki Oshima, Masaru Kawabuchi, Kenichi Okada, Haosheng Zhang, Ashbir Aviat Fadila, Takeshi Nakamura, Rui Wu, Jian Pang, Keiichi Motoi, Shinichi Hori, Daiki Matsumoto, Dongwon You, Bangan Liu, Kazuaki Kunihiro, Atsushi Shirane, Yun Wang, Ryo Kubozoe, Tomoya Kaneko, Junjun Qiu, Rattanan Saengchan, Hanli Liu, Xi Fu
Rok vydání: 2020
Předmět:
Zdroj: IEEE Journal of Solid-State Circuits. 55:1249-1269
ISSN: 1558-173X
0018-9200
DOI: 10.1109/jssc.2020.2980509
Popis: This article presents the first 39-GHz phased-array transceiver (TRX) chipset for fifth-generation new radio (5G NR). The proposed transceiver chipset consists of 4 sub-array TRX elements with local-oscillator (LO) phase-shifting architecture and built-in calibration on phase and amplitude. The calibration scheme is proposed to alleviate phase and amplitude mismatch between each sub-array TRX element, especially for a large-array transceiver system in the base station (BS). Based on LO phase-shifting architecture, the transceiver has a 0.04-dB maximum gain variation over the 360° full tuning range, allowing constant-gain characteristic during phase calibration. A phase-to-digital converter (PDC) and a high-resolution phase-detection mechanism are proposed for highly accurate phase calibration. The built-in calibration has a measured accuracy of 0.08° rms phase error and 0.01-dB rms amplitude error. Moreover, a pseudo-single-balanced mixer is proposed for LO-feedthrough (LOFT) cancellation and sub-array TRX LO-to-LO isolation. The transceiver is fabricated in standard 65-nm CMOS technology with flip-chip packaging. The 8TX–8RX phased-array transceiver module 1-m OTA measurement supports 5G NR 400-MHz 256-QAM OFDMA modulation with −30.0-dB EVM. The 64-element transceiver has a EIRPMAX of 53 dBm. The four-element chip consumes a power of 1.5 W in the TX mode and 0.5 W in the RX mode.
Databáze: OpenAIRE