ITAC: A complete 3D integration test platform
| Autor: | Arnaud Garnier, Gael Pillonnet, R. Segaud, A. Jouve, Pascal Vivet, H. Jacquinot, Alexandre Arriordaz, Fabrice Casset, S. Cheramy, Jean Michailos, N. Bresson, Lucile Arnaud, C. Chantre, Sandrine Lhostis, Didier Lattard, K. Azizi-Mourier, Franck Bana, Alexis Farcy, F. Ponthenier, Stephane Moreau |
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| Rok vydání: | 2016 |
| Předmět: |
Engineering
Integration testing business.industry 020208 electrical & electronic engineering Stacking 02 engineering and technology Chip Supercomputer Die (integrated circuit) Reliability (semiconductor) Embedded system 0202 electrical engineering electronic engineering information engineering System integration business Electronic circuit |
| Zdroj: | 3DIC |
| Popis: | System integration takes benefit from 3D stacking technology in a wide range of applications such as smart imagers, photonic, wide I/O memories and high-performance computing. The 700 mm2 ITAC 3D integration test platform contains a set of “Integrated Technological and Application Circuits” for process development, electrical and RF characterization, reliability, die stacking, warpage and underfilling studies, DC-DC converter and IntAct chip which is the full application chip. After a brief presentation of the targeted high performance computing application. The contributions integrated in the test platform are described with a particular focus on the 10 μm diameter 20 μm pitch die-to-die interconnects which is the key technology of the 3D stack. These test vehicles have been embedded on the same silicon to secure the application chip at all the steps from technology development to assembly and test. |
| Databáze: | OpenAIRE |
| Externí odkaz: |
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