Translating timing requirements of Embedded Software systems modeled in Simulink to a timing analysis model
| Autor: | Arne Noyer, Padma Iyenghar, Joachim Engelhardt, Elke Pulvermueller |
|---|---|
| Rok vydání: | 2016 |
| Předmět: |
business.industry
Computer science 020208 electrical & electronic engineering Static timing analysis 02 engineering and technology Scheduling (computing) Embedded software Workflow Unified Modeling Language Embedded system 0202 electrical engineering electronic engineering information engineering 020201 artificial intelligence & image processing MATLAB Software engineering business computer computer.programming_language |
| Zdroj: | ETFA |
| DOI: | 10.1109/etfa.2016.7733662 |
| Popis: | In model-based Embedded Software Engineering (ESE), individual systems are modeled with chains of components that are translated to chains of tasks/runnables for a scheduling analysis. Early analysis of response time of such systems (e.g. end-to-end path delay) provides important feedback to understand how the function blocks/components in the system may actually behave. In this paper we report on work in progress pertaining to an overall workflow for model-driven specification, translation and validation of such timing constraints in ESE projects developed using Matlab/Simulink. The challenges addressed in this workflow and future directions are outlined. |
| Databáze: | OpenAIRE |
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