1.6 Tbps Silicon Photonics Integrated Circuit and 800 Gbps Photonic Engine for Switch Co-Packaging Demonstration

Autor: RK Chiou, Jonathan K. Doylend, Harinadh Potluri, Ranju Venables, Christopher Seibert, John Heck, Jian Chen, Mohammad Montazeri, B. Xie, A. Awujoola, Yuliya Akulova, S. Gupta, Andrew Alduino, Nelson N. Tang, Richard Jones, Syed S. Islam, Summer R. Hollingsworth, Alexander Krichevsky, Avsar Dahal, Daniel Zhu, S. McCargar, David Hui, Hari Mahalingam, R. L. Spreitzer, Frish Harel, K. M. Brown, Siamak Amiralizadeh, S. Garag, Meer Sakib, Ling Liao, R. S. Appleton, Susheel G. Jadhav, Guneet Kaur, Kimchau N. Nguyen, A. Vardapetyan, Min Cen, Vishnu Kulkarni, Zhi Li, L. Kamyab, Thomas Liljeberg, Saeed Fathololoumi, Reece A. Defrees
Rok vydání: 2021
Předmět:
Zdroj: Journal of Lightwave Technology. 39:1155-1161
ISSN: 1558-2213
0733-8724
DOI: 10.1109/jlt.2020.3039218
Popis: We describe the performance of high bandwidth-density silicon photonic based integrated circuits (SiPh ICs) that enable the first fully functional photonic engine (PE) module co-packaged with an Ethernet switch. We demonstrate the 1.6 Tbps SiPh transmitter (Tx) IC that integrates on-die all the lasers, micro ring modulators, monitor photodetectors, spot size converters, and V-grooves that are needed to support sixteen 106.25 Gbps PAM4 optical transmit channels. This SiPh Tx, together with discrete receiver (Rx) SiPh ICs, enabled an 800 Gbps PE. The PE is designed to allow up to sixteen modules to be co-packaged around a high-bandwidth switch ASIC. The PE test results described in this article were obtained using sixteen 53.125 Gbps electrical channels that were multiplexed to drive eight simultaneously operating 106.25 Gbps optical channels. We report DR4 IEEE standards compliant high-speed optical eye performance as well as full link operation. Post-FEC error-free operation over temperature and over extended time duration is demonstrated on all channels.
Databáze: OpenAIRE