Real-Time FPGA Simulation of Electric Ship Power System Using High-Level Synthesis
| Autor: | Hadil Mustafa, Richard Bednar, Kurtis Kredo, Zahrasadat Alavi, Roy Crosbie |
|---|---|
| Rok vydání: | 2019 |
| Předmět: |
business.industry
Computer science 020208 electrical & electronic engineering Hardware description language 02 engineering and technology 020202 computer hardware & architecture Electric power system Real-time simulation High-level synthesis Middleware Embedded system VHDL 0202 electrical engineering electronic engineering information engineering Verilog Field-programmable gate array business Hardware_REGISTER-TRANSFER-LEVELIMPLEMENTATION computer Hardware_LOGICDESIGN computer.programming_language |
| Zdroj: | 2019 IEEE Electric Ship Technologies Symposium (ESTS). |
| DOI: | 10.1109/ests.2019.8847870 |
| Popis: | In this paper, we present an approach to model simulation systems at the Register-Transistor Level RTL for an efficient implementation on Field Programmable Gate Arrays FPGAs. The process uses a hybrid technique utilizing two commercially available tools, Simulink Coder and Xilinx Vivado HLD, as well as a middleware procedure to produce an accurate implementation of a model system in HDL, e.g. Verilog and VHDL. The implementation technique does not require expertise knowledge in Digital Design or Hardware Description Language HDL, yet it produces a complete description of the simulator in HDL. Using an example model of electric ship power system, we evaluate the effectiveness of the approach in developing a precise model in RTL for Real-Time simulation while accelerating the overall execution time. |
| Databáze: | OpenAIRE |
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