Morphed Standard Cell Layouts for Pin Length Reduction
Autor: | Rung-Bin Lin, Cheng-Wei Tai |
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Rok vydání: | 2019 |
Předmět: |
Standard cell
Design space exploration Computer science Work (physics) 0211 other engineering and technologies 02 engineering and technology 020202 computer hardware & architecture Reduction (complexity) Computer engineering Hardware_INTEGRATEDCIRCUITS 0202 electrical engineering electronic engineering information engineering Routing (electronic design automation) 021106 design practice & management Electronic circuit |
Zdroj: | ISVLSI |
DOI: | 10.1109/isvlsi.2019.00025 |
Popis: | In this article we present a concept called morphed layouts which are layouts of a standard cell with different footprints on the pins of each layout. We propose two approaches to exploiting morphed layouts for pin length reduction. The first approach is performed after placement but before routing. This approach enables design space exploration to seek best trade-off between total wire length and via count. It can obtain better results than the previous work when dealing with large circuits. The second approach is applied to a routed design, which can always achieve pin length reduction without via count increase. It can on average reduce total pin length by 12.1% and total wire length by 3.4%. |
Databáze: | OpenAIRE |
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