On-Chip Circuit for Measuring Data Jitter in the Time or Frequency Domain
Autor: | M. Ishida, Mani Soma, M. Suda, Toshiyuki Okayasu, Takahiro Yamaguchi, K. Ichiyama |
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Rok vydání: | 2007 |
Předmět: | |
Zdroj: | 2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium. |
DOI: | 10.1109/rfic.2007.380898 |
Popis: | An on-chip data jitter measurement circuit in 0.11-mum CMOS is demonstrated. It utilizes a data-to-clock converter, pulse generators, and an integrator followed by a sample-&-hold. The circuit outputs a data jitter waveform in real-time, and doesn't require a reference clock. Its measurement linearity is 11 muV/ps with an error of 1.56 psRMS for a 2.5 Gbps 7-stage PRBS. |
Databáze: | OpenAIRE |
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