A physical design methodology for 1.3 GHz SPARC 64 microprocessor

Autor:	Hiroaki Komatsu, H. Hamamura, Noriyuki Ito, Hiroyuki Sugiyama, Yaroku Sugiyama, Y. Tanamura, Ryoichi Yamashita
Rok vydání:	2004
Předmět:	Engineering Schedule Microprocessor Application-specific integrated circuit Computer architecture business.industry law Microprocessor design Physical design business Design team law.invention
Zdroj:	ICCD
DOI:	10.1109/iccd.2003.1240896
Popis:	We present a physical design methodology that was applied to the design of Fujitsu 1.3 GHz SPARC 64 microprocessor. A tool-set called GigaGate was developed based on this methodology. The goal of GigaGate is to support the design team to complete the high-performance microprocessor design on schedule.
Databáze:	OpenAIRE
Externí odkaz:	https://explore.openaire.eu/search/publication?articleId=doi_________::437a70cc9ec84d4c3ae23c556f529ceb https://doi.org/10.1109/iccd.2003.1240896 Zobrazit plný text záznamu