Automatic Single-Flux-Quantum (SFQ) Logic Synthesis Method for Top-Down Circuit Design
| Autor: | Shinichi Yorozu, Yoshio Kameda, Yoshihito Hashimoto |
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| Rok vydání: | 2006 |
| Předmět: |
History
Sequential logic Computer science Circuit design Logic family Circuit extraction Computer Science Applications Education Logic synthesis Hardware_INTEGRATEDCIRCUITS Electronic engineering Hardware_REGISTER-TRANSFER-LEVELIMPLEMENTATION Hardware_LOGICDESIGN Asynchronous circuit Register-transfer level Logic optimization |
| Zdroj: | Journal of Physics: Conference Series. 43:1179-1182 |
| ISSN: | 1742-6596 1742-6588 |
| DOI: | 10.1088/1742-6596/43/1/287 |
| Popis: | Single-flux-quantum (SFQ) logic circuits provide faster operations with lower power consumption, using Josephson junctions as the switching devices. In the top-down flow of SFQ circuit design, we have already developed a place-and-route tool that covers backend circuit design. In this paper, we present an automatic SFQ logic synthesis method that covers front-end circuit design. The logic synthesis is a process that generates a gate-level logic circuit from a functional specification written in hardware description languages. In our SFQ synthesis method, after we generate an intermediate circuit with the help of a synthesis tool for semiconductor circuits, we convert it into a gate-level pipelined SFQ circuit. To do this, an automatic synthesis tool was implemented. To evaluate the effectiveness of the method and the tool, we synthesized arithmetic and logic units (ALUs). It took only two and half minutes to synthesize a 64-bit-width ALU that consisted of about 18, 000 gates. |
| Databáze: | OpenAIRE |
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