Low power, high precision and reduced size CMOS Comparator for high speed ADC design

Autor: F. A. Talukdar, Krishna Lal Baishnab, Amalan Nag
Rok vydání: 2010
Předmět:
Zdroj: 2010 5th International Conference on Industrial and Information Systems.
DOI: 10.1109/iciinfs.2010.5578706
Popis: In this paper a low power CMOS Comparator is proposed which is very well capable of distinguishing DC voltage difference of around even 0.2 mV. By providing excitory feedback, the proposed compact circuit is made to successfully avoid the need of a post amplifier or any other cascading stages. The circuit can also operate at a wide range of power supply starting from 1.1 V with a clock frequency of 200MHz. Some trade off between precision and resolution are vividly discussed to get a better understanding of the circuit behavior. The simulated results are shown which are done in CADANCE gpdk-90 technology.
Databáze: OpenAIRE