Analysis of electrical power in IBM POWER9 direct-attached memory subsystem
| Autor: | Sharath Manjunath, Michael Pardeik, Wiren D. Becker, Anil B. Lingambudi |
|---|---|
| Rok vydání: | 2018 |
| Předmět: |
010302 applied physics
Hardware_MEMORYSTRUCTURES Computer science Firmware Memory bandwidth 02 engineering and technology computer.software_genre 01 natural sciences 020202 computer hardware & architecture Power (physics) Server 0103 physical sciences 0202 electrical engineering electronic engineering information engineering Bandwidth (computing) Operating system Electric power IBM Double data rate computer |
| Zdroj: | 2018 IEEE Electrical Design of Advanced Packaging and Systems Symposium (EDAPS). |
| DOI: | 10.1109/edaps.2018.8680887 |
| Popis: | POWER9 processors are the current generation IBM POWER processors supporting direct-attached memory on the POWER series server systems. The POWER9 processors supports Industry Standard Registered Dual In-line Memory Modules (IS-RDIMM) running with Double Data Rate Generation 4 (DDR4) technology for the single-drop and dual-drop memory configurations. Memory throttling is an important feature of IBM systems for generations, but for the first time through direct-attached DDR memory interface in POWER9. Discussed in this paper is a case-study of the different memory throttles, their direct impact on the overall memory bandwidth and finally, the estimation of power consumed by the memory subsystem on POWER9 systems. The memory subsystem power estimation and consumption study determine the system bulk power requirements, apply them to system firmware and finally the datacenter architecture for IBM’s customers. |
| Databáze: | OpenAIRE |
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