| Autor: |
Yonghong Liu, Zhengqiang Yu, Yusong Ma, Lanfang Wang, Dongmei Liu, Jian Wang, PingPing Zheng |
| Rok vydání: |
2020 |
| Předmět: |
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| Zdroj: |
2020 IEEE 9th Joint International Information Technology and Artificial Intelligence Conference (ITAIC). |
| DOI: |
10.1109/itaic49862.2020.9338786 |
| Popis: |
This paper mainly discusses the effects of the layout design of fuse on wafer sawing/dicing process based on a RF chip layout, including the selection of sawing method, the accuracy of dicing offset control, the service life of saw blade and so no. And analyzes how to choose proper wafer sawing process, saw blade and offset precision according to fuse design, so as to reduce the effects of metal structure on wafer sawing yield. Meanwhile, this paper also suggests IC designers could consider such effects on the packaging process that discussed in this paper and do feasibility verification of manufacturing in cooperation with the assembly house. |
| Databáze: |
OpenAIRE |
| Externí odkaz: |
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