ECO Optimization Using Metal-Configurable Gate-Array Spare Cells
| Autor: | Iris Hui-Ru Jiang, Yao-Wen Chang, Hua-Yu Chang |
|---|---|
| Rok vydání: | 2013 |
| Předmět: |
Engineering
Engineering change order business.industry Overhead (engineering) Hardware_PERFORMANCEANDRELIABILITY Integrated circuit design Computer Graphics and Computer-Aided Design Logic synthesis Gate array Embedded system Spare part Hardware_INTEGRATEDCIRCUITS Electronic engineering Electrical and Electronic Engineering business Design closure Integer programming Software Hardware_LOGICDESIGN |
| Zdroj: | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 32:1722-1733 |
| ISSN: | 1937-4151 0278-0070 |
| DOI: | 10.1109/tcad.2013.2272540 |
| Popis: | Due to the rapidly increasing design complexity in modern IC designs, metal-only engineering change order (ECO) becomes inevitable to achieve design closure with a low respin cost. Traditionally, preplaced redundant standard cells are regarded as spare cells. However, these cells are limited by predefined functionalities and locations, and they always consume leakage power despite their inputs being tied off. To overcome the inflexibility and power overhead, a new type of spare cells, called metal-configurable gate-array spare cells, are introduced. In this paper, we address a new ECO problem, which performs design changes using metal-configurable gate-array spare cells. We first study the properties of this new ECO problem and propose a new cost metric, aliveness, to model the capability of a spare gate array. Based on aliveness and routability, we then develop two ECO optimization frameworks, one for timing ECO and the other for functional ECO. Experimental results show that our approach delivers superior efficiency and effectiveness. |
| Databáze: | OpenAIRE |
| Externí odkaz: |
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