Structured design-for-debug-the SuperSPARC II methodology and implementation
| Autor: | Hong Hao, R. Avra |
|---|---|
| Rok vydání: | 2002 |
| Předmět: |
Very-large-scale integration
Engineering Structured analysis Reduced instruction set computing business.industry media_common.quotation_subject Design for testing Hardware_PERFORMANCEANDRELIABILITY Chip SuperSPARC law.invention Microprocessor Debugging Computer architecture law Embedded system Hardware_INTEGRATEDCIRCUITS business media_common |
| Zdroj: | ITC |
| DOI: | 10.1109/test.1995.529831 |
| Popis: | This paper describes a structured design-for-debug methodology that provides observability throughout an entire chip. It makes use of existing design-for-testability (DFT) features on the chip and is part of the overall DFT strategy. The implementation of the methodology on the SuperSPARC II microprocessor is described. This methodology has been instrumental in the successful silicon debug and timely shipment of the chip. |
| Databáze: | OpenAIRE |
| Externí odkaz: |
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