Autor: |
Shigeo Furuta, Yuichiro Masuda, S. Kumaragurubaran, Masatoshi Ono, Tsuyoshi Takahashi, Yasuhisa Naitoh, Tetsuo Shimizu, Masayo Horikawa, Touru Sumiya, Y. Hayashi, Hiroshi Suga |
Rok vydání: |
2012 |
Předmět: |
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Zdroj: |
2012 IEEE Silicon Nanoelectronics Workshop (SNW). |
DOI: |
10.1109/snw.2012.6243334 |
Popis: |
A 4k bits nonvolatile high-speed nanogap memory device was fabricated with a newly developed vertical nanogap structure and its memory characteristics were evaluated. The newly developed vertical nanogap structures realized controllable electrode gap and higher yield compared to the initial phase lateral type nanogap structure. The structures were integrated on a CMOS chip. The specially embedded measurement circuit revealed programming speed from a low resistance state to a high resistance state (from on to off state) to be 1 ns. |
Databáze: |
OpenAIRE |
Externí odkaz: |
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