Autor: |
Nak-Jin Son, Yongmin Park, Hwa-Sung Rhee, Sung Gun Kang, Sung-il Cho, Kyung-Hwan Yeo, Eun-Cheol Lee, Yun-Ki Choi, Jong Shik Yoon, Heebum Hong, Jeong-Hoon Ahn, Dongwoo Kim, Il-Ryong Kim, Jungtae Kim, Jong Mil Youn, Jae-Hun Jeong |
Rok vydání: |
2018 |
Předmět: |
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Zdroj: |
2018 IEEE Symposium on VLSI Technology. |
Popis: |
8LPP logic platform technology supports mobile and high-performance and lower power application especially for mobile, artificial intelligence (AI), and cryptocurrency devices. 8LPP is employing the evolutionary generation of bulk FinFET FEOL and 44nm EUV-less multi-patterning BEOL process, resulting in 7% power reduction and ~15% area scaling compared with the previous 10LPP. The cost-effective high volume manufacturing is achieved with the minimum additional critical layers and the comparable process steps over the current high volume 10nm production. |
Databáze: |
OpenAIRE |
Externí odkaz: |
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