| Autor: |
Jin-woo Lee, Sunghoon Ahn, Byung-Ryul Kim, Kichang Chun, Pil Seon Yoo, Taisik Shin, Yonghwan Hong, Sungwook Choi, Nam-Kyeong Kim, Kunwoo Park, Wanseob Lee, Sunghyun Jung, Tae-Yun Kim, Sungdae Choi, Byoung-Young Kim, Ingon Yang, Hyun-Chul Cho, Jaehyeon Shin, Hyunjong Jin, Duckju Kim, Youngdon Jung, Jinwoong Kim |
| Rok vydání: |
2014 |
| Předmět: |
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| Zdroj: |
ISSCC |
| DOI: |
10.1109/isscc.2014.6757455 |
| Popis: |
This paper presents a 64Gb MLC NAND-Flash memory fabricated with 16nm CMOS process technology to achieve high density and as small as 93.4mm2 die area. The chip consists of two planes of 1072 blocks each. A block consists of a string with 128 cells and a page size with 16KB and spare area for error-correction coding (ECC), totaling 4MB of capacity. The chip supports negative-level wordline drivability to increase cell Vth margin. |
| Databáze: |
OpenAIRE |
| Externí odkaz: |
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