Model of subsystem obstacle detection for mobile RTS on based FPGA
Autor: | Vasyl Teslyuk, Denys Nyzovets, Kateryna Matviichuk, Roman Zaharyuk, Oleh Shepelyuk |
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Rok vydání: | 2015 |
Předmět: |
Engineering
Structure diagram business.industry Solid modeling Construct (python library) Ultrasonic imaging Computer Science::Hardware Architecture Obstacle Embedded system VHDL Mobile telephony Hardware_ARITHMETICANDLOGICSTRUCTURES business Field-programmable gate array Hardware_REGISTER-TRANSFER-LEVELIMPLEMENTATION computer Hardware_LOGICDESIGN computer.programming_language |
Zdroj: | The Experience of Designing and Application of CAD Systems in Microelectronics. |
DOI: | 10.1109/cadsm.2015.7230850 |
Popis: | Structural diagram was construct of subsystem identify barriers, built the core, the model of subsystem obstacle detection to FPGA and presents the VHDL model. |
Databáze: | OpenAIRE |
Externí odkaz: |