| Popis: |
The circuit proposed in this paper allows to generate a sub-1V 50 nA current reference. By changing the inversion mode of two transistors, the original Oguey's structure becomes compliant with ultra low voltage requirements, while preserving the topology inherent simplicity, guarantee of low cost. Furthermore, the use of EKV2.0 MOS model involves an inversion level free study. As a consequence, supply voltage and/or silicon area can be optimized unambiguously in regards to current target and technology. Simulation with a higher than 500 mV Vt technology, for an inversion level of only 2.78, gives a minimum supply voltage of 710 mV. |
