Fabrication of III–V on Insulator Structures on Si Using Microchannel Epitaxy with a Two-Step Growth Technique

Autor:	Shinichi Takagi, Masato Shichijo, Ryosho Nakane, Satoshi Sugahara
Rok vydání:	2007
Předmět:	Microchannel Fabrication Materials science Physics and Astronomy (miscellaneous) APDS business.industry Transistor General Engineering General Physics and Astronomy Insulator (electricity) Nanotechnology Epitaxy law.invention Semiconductor law Growth rate business
Zdroj:	Japanese Journal of Applied Physics. 46:5930-5934
ISSN:	1347-4065 0021-4922
Popis:	We report a new microchannel epitaxy (MCE) technique for forming III–V semiconductor on insulator (III–V-OI) structures on a Si substrate with a thermally oxidized SiO2 mask for high performance n-type metal–insulator–semiconductor field-effect transistors (MISFETs). To reduce dislocations and antiphase domains (APDs), we propose a novel fabrication method of forming III–V-OI structures, where a two-step growth method is combined with MCE. The growth temperature of the low-temperature buffer layers and the growth rate in the two-step growth are optimized to meet the competing requirements for the reduction in APDs and selective growth. We demonstrate a fabrication of high-quality GaAs-OI structures using our proposed growth method under an optimized growth condition.
Databáze:	OpenAIRE
Externí odkaz:	https://explore.openaire.eu/search/publication?articleId=doi_________::3ef4d39a0acc8ffe60f0408e2166796e https://doi.org/10.1143/jjap.46.5930 Zobrazit plný text záznamu