The coarse and fine granular fault tolerance techniques in FPGA-based processors
| Autor: | Heinrich Theodor Vierhaus, Farnoosh Hosseinzadeh, Petr Pfeifer |
|---|---|
| Rok vydání: | 2017 |
| Předmět: |
business.industry
Computer science Reliability (computer networking) Mission critical Overhead (engineering) Control reconfiguration 020207 software engineering Fault tolerance 02 engineering and technology 020202 computer hardware & architecture Spare part Embedded system 0202 electrical engineering electronic engineering information engineering Granularity business Field-programmable gate array |
| Zdroj: | SPA |
| DOI: | 10.23919/spa.2017.8166849 |
| Popis: | Due to the features of FPGA architectures such as high performance and reconfiguration at run time, they have become remarkable contenders for many mission critical applications, much beyond rapid prototyping only. As the feature size of the semiconductor technology shrinks, also FPGA-based systems using underlying nano-technologies suffer from age-induced parameter deterioration that may finally result in permanent faults. Hence, the mechanisms embedding into such systems for detecting and handling such faults in the field of operation is an essential requirement for increasing the reliability. This paper presents different approaches in handling the permanent faults in FPGA-based soft processors at a coarse and fine granularity. Self-repair methods are implemented through utilizing spare units as a substitute of corrupted units in the design and a partial reconfiguration technique. The method aims at using local fault handling methods to make use of extra resources in the system with the lowest overhead in time and area. The results were achieved by using Xilinx 28 nm technology and two soft processors. |
| Databáze: | OpenAIRE |
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