A FPGA ray tracing scheme with memory optimization facility

Autor: Wan Wang Gen, Huang Wei
Rok vydání: 2011
Předmět:
Zdroj: IET International Communication Conference on Wireless Mobile and Computing (CCWMC 2011).
DOI: 10.1049/cp.2011.0903
Popis: This article presents a ray tracing acceleration system realized on FPGA platform. Additionally we make improvement to the memory accessing performance and achieve ideal ratio of performance against resources. Such work will gain ray tracing more applicable regions. The global scheme includes spatial indexing hierarchy module, ray generation module, pre-masking module, packet traversal module, arithmetic module and memory optimization facility which is described specially in this article..
Databáze: OpenAIRE