Development of chip shrink technology for lateral-type GaN based HFETs using SiO2/polyimide dual IMD layers
Autor: | Hwa-Young Ko, Seung Kyu Oh, Taehoon Jang, Joon Seop Kwak |
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Rok vydání: | 2015 |
Předmět: | |
Zdroj: | Electronic Materials Letters. 11:213-216 |
ISSN: | 2093-6788 1738-8090 |
Popis: | This study examined chip shrink technology for lateral-type AlGaN/GaN HFETs on 150 mm Si substrates fabricated with a bonding pad above the active area (BPAA) structure. The SiO2/polyimide layers were used as inter metal dielectric (IMD) layers, which yielded a very low leakage current of 0.58 nA/mm2 even at 1 kV and a good adhesion property after O2 plasma treatment. The fabricated AlGaN/GaN HFETs with the BPAA structure exhibited good device characteristics, such as a low leakage current of 7.1 nA at 1 kV and a drain current of 3.6 A at 2 V, which has the same value compared to that of the AlGaN/GaN HFETs without the BPAA structure, even though the BPAA structure reduced the size of chip by 40%. This suggests that the BPAA structure is a promising method for reducing the size and cost of the lateral-type AlGaN/GaN HFETs. |
Databáze: | OpenAIRE |
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