A CMOS 180nm class-AB power amplifier with intergrated phase linearizer for BLE 4.0 achieving 11.5dB gain, 38.4% PAE and 20dBm OIP3
| Autor: | Premmilaah Gunasegaran, Harikrishnan Ramiah, Jagadheswaran Rajendran |
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| Rok vydání: | 2017 |
| Předmět: |
Power gain
Computer science business.industry Amplifier 020208 electrical & electronic engineering Electrical engineering Linearity 020206 networking & telecommunications 02 engineering and technology Capacitance Electricity generation CMOS Linearizer 0202 electrical engineering electronic engineering information engineering business Voltage |
| Zdroj: | 2017 IEEE Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics (PrimeAsia). |
| DOI: | 10.1109/primeasia.2017.8280364 |
| Popis: | In this paper, the design of a low power consumption linear power amplifier (PA) for Bluetooth Low Energy (BLE) application is presented. A passive linearizer is integrated at the input of the CMOS PA to nullify the effect of the Cgs capacitance thus improving the linearity and efficiency without trading-off the power gain and stability. The PA delivers more than 10dB power gain from 2.4GHz to 2.5GHz. At centre frequency of 2.45GHz, the PA exhibits gain of 11.5dB with corresponding PAE of 38.4% and maximum output power of 15dBm followed by OIP3 of 20.3dBm. This performance is achieved with supply voltage headroom of 1.8V. The proposed linearization scheme serves to be a good solution to improve the linear output power of a CMOS PA without trading off other critical parameters. |
| Databáze: | OpenAIRE |
| Externí odkaz: |
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