RRAM-based Spiking Nonvolatile Computing-In-Memory Processing Engine with Precision-Configurable In Situ Nonlinear Activation
| Autor: | Meng-Fan Chang, Kung-Tang Chang, Hai Li, Yi Chen, Qing Yang, Shyh-Shyuan Sheu, Sih-Han Li, Heng-Yuan Lee, Mon-Shu Ho, Bonan Yan, Wei-Hao Chen, Chien-Hua Hsu, Jian-Wei Su, Qing Wu |
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| Rok vydání: | 2019 |
| Předmět: |
Artificial neural network
Computer science 020208 electrical & electronic engineering Activation function 02 engineering and technology 021001 nanoscience & nanotechnology Nonlinear system In-Memory Processing Control theory 0202 electrical engineering electronic engineering information engineering Electronic engineering 0210 nano-technology Electrical efficiency Throughput (business) Electronic circuit |
| Zdroj: | 2019 Symposium on VLSI Technology. |
| DOI: | 10.23919/vlsit.2019.8776485 |
| Popis: | This work presents a hybrid CMOS-RRAM integration of spiking nonvolatile computing-in-memory (nvCIM) processing engine (PE) that includes a 64Kb RRAM macro and a novel in situ nonlinear activation (ISNA) module. We integrate the computing controller and nonlinear activation function on-chip to compute convolutional or fully-connected neural network. ISNA merges A/D conversion and activation computation by leveraging its nonlinear working region. This eliminates the need for additional circuits to realize nonlinearity and reduces area by 43.7x w.r.t. the ADC scheme. The activation precision of ISNA can be configured from 1 to 8 bits to balance throughput, accuracy and power efficiency. The measurement of 4-layer LeNet shows such optimization improves 23.1% of computing speed via compromising a 2.5% relative accuracy drop. The proposed nvCIM PE achieves 16.9 TOPS/W power efficiency and a maximum spike frequency of 99.24 MHz. |
| Databáze: | OpenAIRE |
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